1. Field of the Invention
The present invention relates to a plasma etching apparatus for subjecting a substrate to be processed, such as a semiconductor wafer, to an etching process.
2. Description of the Related Art
A plasma etching apparatus is used to pattern an electrically conductive film for wiring, which is formed on a substrate such as a semiconductor wafer, an LCD substrate, etc. The plasma etching apparatus has a vacuum processing chamber (process chamber) for storing the substrate to be processed and defining a processing space. A pair of opposed upper and lower electrodes are provided within the process chamber, and a substrate to be processed, such as a semiconductor wafer, is placed on the lower electrode functioning as susceptor. A process gas (etching gas) is introduced into the process chamber and a high-frequency power is applied across the upper and lower electrodes. Then, the process gas is made into a plasma. Reactive ions in the plasma are pulled by a self-bias potential of the wafer, and an electrically conductive film formed on the wafer is etched and patterned.
A focus ring (electric field compensating ring) is provided to surround the wafer on the lower electrode, thereby to effectively direct the reactive ions onto the wafer. It is necessary that the focus ring have anti-corrosion properties (anti-chemical properties with high resistance to etching gas), anti-plasma properties, heat resistance and electrical conductivity. From this standpoint, a ring formed integrally of amorphous carbon is generally used as a focus ring.
In the plasma etching apparatus using the above focus ring, however, an etching rate and in-plane uniformity of etching anisotropy may deteriorate in some cases, depending on process conditions. Specifically, the etching rate is high at the peripheral portion of the wafer and low at the central portion thereof. In particular, this tendency is conspicuous when the temperature of the major surface of the wafer is set at high value, and the etching rate at the peripheral portion of the wafer is very high. In addition, under the circumstances, the etching anisotropy at the peripheral portion of the wafer deteriorates and side etching occurs in the patterning of the electrically conductive film. As a result, the width of the formed wiring becomes less than a set value.
The main factor of in-plane uniformity of the etching rate and etching anisotropy is considered to be the influence of a gas stream caused by exhaust in the process chamber during etching. The gas stream is led downward from above the lower electrode through a region surrounding the lower electrode. Thus, a great deal of fresh process gas is led to the peripheral portion of the wafer, whereas the gas stream stagnates at the central portion thereof. A less quantity of fresh process gas reaches the central portion of the wafer. As a result, an etching mechanism differs between the peripheral portion and central portion of the wafer, and the etching rate and etching anisotropy become non-uniform.